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19-2438; Rev 3; 10/03
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
General Description
The MAX7301 compact, serial-interfaced I/O expander (or general-purpose I/O (GPIO) peripheral) provides microprocessors with up to 28 ports. Each port is individually user configurable to either a logic input or logic output. Each port can be configured either as a push-pull logic output capable of sinking 10mA and sourcing 4.5mA, or a Schmitt logic input with optional internal pullup. Seven ports feature configurable transition detection logic, which generates an interrupt upon change of port logic level. The MAX7301 is controlled through an SPITM-compatible 4-wire serial interface. The MAX7301AAX and MAX7301AGL have 28 ports and are available in 36-pin SSOP and 40-pin QFN packages, respectively. The MAX7301AAI and MAX7301ANI have 20 ports and are available in 28-pin SSOP and 28-pin DIP packages, respectively. For a 2-wire interfaced version, refer to the MAX7300 data sheet. For a pin-compatible port expander with additional 24mA constant-current LED drive capability, refer to the MAX6957 data sheet.
Features
High-Speed 26MHz SPI-/QSPI-TM/MICROWIRETMCompatible Serial Interface 2.5V to 5.5V Operation -40C to +125C Temperature Range 20 or 28 I/O Ports, Each Configurable as Push-Pull Logic Output Schmitt Logic Input Schmitt Logic Input with Internal Pullup 11A (max) Shutdown Current Logic Transition Detection for Seven I/O Ports
MAX7301
Ordering Information
PART MAX7301ANI MAX7301AAI MAX7301AAX MAX7301AGL TEMP RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C PIN-PACKAGE 28 DIP 28 SSOP 36 SSOP 40 QFN
Applications
White Goods Automotive Gaming Machines Industrial Controllers System Monitoring
47nF 39k 3V 36 V+ 3 GND 2 GND 1 P4 32 P5 30 P6 28 P7 26 I/O 4 I/O 5 I/O 6 I/O 7 I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O 14 I/O 15 I/O 16 I/O 17 I/O 18 I/O 19 I/O 20 I/O 21 I/O 22 I/O 23 I/O 24 I/O 25 I/O 26 I/O 27 I/O 28 I/O 29 I/O 30 I/O 31
Typical Operating Circuit
MAX7301
ISET
P8 P9 P10
CHIP SELECT CLOCK IN DATA IN DATA OUT
35 33
CS SCLK 34 DIN 4 DOUT 31 P31 29 P30 27 P29 25 P28 24 P27 23 P26 22 P25 21 P24
P11 P12 6 P13 8 P14 10 P15 12 P16 13 P17 14 P18 15 P19 16 P20 17 P21 18 P22 19 P23 20
5 7 9 11
Pin Configurations appear at end of data sheet. SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND) V+ .............................................................................-0.3V to +6V All Other pins................................................-0.3V to (V+ + 0.3V) P4-P31 Current ................................................................30mA GND Current .....................................................................800mA Continuous Power Dissipation (TA = +70C) 28-Pin PDIP (derate 20.8mW/C above +70C).........1667mW 28-Pin SSOP (derate 9.5mW/C above +70C) ...........762mW 36-Pin SSOP (derate 11.8mW/C above +70C) .........941mW 40-Pin QFN (derate 23.25mW/C above +70C) .......1860mW Operating Temperature Range (TMIN, TMAX) ..................................................-40C to +125C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETER Operating Supply Voltage Shutdown Supply Current SYMBOL V+ ISHDN All digital inputs at V+ or GND All ports programmed as outputs high, no load, all other inputs at V+ or GND All ports programmed as outputs low, no load, all other inputs at V+ or GND All ports programmed as inputs without pullup, ports, and all other inputs at V+ or GND TA = +25C TA = -40C to +85C TA = TMIN to TMAX TA = +25C TA = -40C to +85C TA = TMIN to TMAX TA = +25C TA = -40C to +85C TA = TMIN to TMAX TA = +25C TA = -40C to +85C TA = TMIN to TMAX 110 170 180 Operating Supply Current (Output High) IGPOH CONDITIONS MIN 2.5 5.5 TYP MAX 5.5 8 10 11 230 250 270 210 230 240 135 140 145 A A A A UNITS V
Operating Supply Current (Output Low)
IGPOL
Operating Supply Current (Input)
IGPI
INPUTS AND OUTPUTS Logic High Input Voltage Port Inputs Logic Low Input Voltage Port Inputs Input Leakage Current GPIO Input Internal Pullup to V+ Hysteresis Voltage GPIO Inputs VIH VIL IIH, IIL IPU VI GPIO outputs, ISOURCE = 2mA, TA = -40C to +85C GPIO outputs, ISOURCE = 1mA, TA = TMIN to TMAX (Note 2) V+ 0.7 V V+ 0.7 GPIO inputs without pullup, VPORT = V+ to GND V+ = 2.5V V+ = 5.5V -100 12 80 1 19 120 0.3 0.7 V+ 0.3 V+ +100 30 180 V V nA A V
Output High Voltage
VOH
2
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETER Port Sink Current Output Short-Circuit Current Input High-Voltage SCLK, DIN, CS Input Low-Voltage SCLK, DIN, CS Input Leakage Current SCLK, DIN, CS Output High-Voltage DOUT Output Low-Voltage DOUT SYMBOL IOL IOLSC VIH VIL IIH, IIL VOH VOL ISOURCE = 1.6mA ISINK = 1.6mA -50 V+ 0.5 0.4 VPORT = 0.6V Port configured output low, shorted to V+ V+ 3.3V V+ > 3.3V CONDITIONS MIN 2 2.75 1.6 2 0.6 +50 TYP 10 11 MAX 18 20 UNITS mA mA V V nA V V
MAX7301
TIMING CHARACTERISTICS (Figure 3)
(V+ = 2.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETER CLK Clock Period CLK Pulse Width High CLK Pulse Width Low CS Fall to SCLK Rise Setup Time CLK Rise to CS Rise Hold Time DIN Setup Time DIN Hold Time Output Data Propagation Delay Minimum CS Pulse High SYMBOL tCP tCH tCL tCSS tCSH tDS tDH tDO tCSW CLOAD = 25pF 19 CONDITIONS MIN 38.4 19 19 9.5 0 9.5 0 21 TYP MAX UNITS ns ns ns ns ns ns ns ns ns
Note 1: All parameters tested at TA = +25C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design.
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
__________________________________________Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
OPERATING SUPPLY CURRENT vs. TEMPERATURE
MAX7301 toc01
SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE
MAX7301 toc02
OPERATING SUPPLY CURRENT vs. V+ (OUTPUTS UNLOADED)
MAX7301 toc03
0.40 0.36 0.32 SUPPLY CURRENT (mA) 0.28 0.24 0.20 0.16 0.12 0.08 0.04 0 -40.0 -12.5 15.0 42.5 70.0 97.5 ALL PORTS INPUT HIGH ALL PORTS OUTPUT (1) ALL PORTS OUTPUT (0) V+ = 2.5V TO 5.5V NO LOAD
8
1
V+ = 5.5V 6
SUPPLY CURRRENT (mA)
7 SUPPLY CURRENT (A)
ALL PORTS OUTPUT (1) ALL PORTS OUTPUT (0)
5 V+ = 3.3V 4
V+ = 2.5V
ALL PORTS INPUT (PULLUPS DISABLED) 0.1 -40.0 -12.5 15.0 42.5 70.0 97.5 125.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 TEMPERATURE (C) V+ (V)
3 125.0 TEMPERATURE (C)
GPO SINK CURRENT vs. TEMPERATURE (OUTPUT = 0)
MAX7301 toc04
GPO SOURCE CURRENT vs. TEMPERATURE (OUTPUT = 1)
VPORT = 1.4 8 PORT SOURCE CURRENT (mA) 7 6 5 4 3 2 V+ = 5.5V V+ = 3.3V V+ = 2.5V
MAX7301 toc05
18 V+ = 2.5V TO 5.5V, VPORT = 0.6V 16 PORT SINK CURRENT (mA) 14 12 10 8 6 4 2 -40.0 -12.5 15.0 42.5 70.0 97.5
9
125.0
-40.0
-12.5
15.0
42.5
70.0
97.5
125.0
TEMPERATURE (C)
TEMPERATURE (C)
GPI PULLUP CURRENT vs. TEMPERATURE
MAX7301 toc06
GPO SHORT-CIRCUIT CURRENT vs. TEMPERATURE
MAX7301 toc07
1000
100
PULLUP CURRENT (A)
PORT CURRENT (mA)
V+ = 5.5V
GPO = 0, PORT SHORTED TO V+ 10
100 V+ = 3.3V V+ = 2.5V
GPO = 1, PORT SHORTED TO GND 10 -40.0 -12.5 15.0 42.5 70.0 97.5 125.0 TEMPERATURE (C) 1 -40.0 -12.5 15.0 42.5 70.0 97.5 125.0 TEMPERATURE (C)
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
Pin Description
PIN SSOP 1 2, 3 4 -- SSOP DIP 1 2, 3 4 5-24 NAME QFN 36 37, 38, 39 40 -- 1-10, 12-19, 21-30 32 33 34 35 ISET GND DOUT P12-P31 Bias Current Setting. Connect ISET to GND through a resistor (RISET) value of 39k to 120k. Ground 4-Wire Interface Serial Data Output Port I/O Ports. P12 to P31 can be configured as push-pull outputs, CMOS logic inputs, or CMOS logic inputs with weak pullup resistor. I/O Ports. P4 to P31 can be configured as push-pull outputs, CMOS logic inputs, or CMOS logic inputs with weak pullup resistor. 4-Wire Interface Serial Clock Input Port 4-Wire Interface Serial Data Input Port 4-Wire Interface Chip-Select Input, Active Low Positive Supply Voltage. Bypass V+ to GND with a minimum 0.047F capacitor. FUNCTION
MAX7301
5-32
--
P4-P31
33 34 35 36
25 26 27 28
SCLK DIN CS V+
Detailed Description
The MAX7301 GPIO peripheral provides up to 28 I/O ports, P4 to P31, controlled through an SPI-compatible serial interface. The ports can be configured to any combination of logic inputs and logic outputs, and default to logic inputs on power-up. Figure 1 is the MAX7301 functional diagram. Any I/O port can be configured as a push-pull output (sinking 10mA, sourcing 4.5mA), or a Schmitt-trigger logic input. Each input has an individually selectable internal pullup resistor. Additionally, transition detection allows seven ports (P24 through P30) to be monitored in any maskable combination for changes in their logic status. A detected transition is flagged through an interrupt pin (port P31). The port configuration registers set the 28 ports, P4 to P31, individually as GPIO. A pair of bits in registers 0x09 through 0x0F sets each port's configuration (Tables 1 and 2). The 36-pin MAX7301AAX has 28 ports, P4 to P31. The 28-pin MAX7301ANI and MAX7301AAI make only 20 ports available--P12 to P31. The eight unused ports should be configured as outputs on power-up by writing 0x55 to registers 0x09 and 0x0A. If this is not done, the eight unused ports remain as floating inputs and quiescent supply current rises, although there is no damage to the part.
Register Control of I/O Ports Across Multiple Drivers
The MAX7301 offers 20 or 28 I/O ports, depending on package choice. Two addressing methods are available. Any single port (bit) can be written (set/cleared) at once; or, any sequence of eight ports can be written (set/cleared) in any combination at once. There are no boundaries; it is equally acceptable to write P0 through P7, P1 through P8, or P31 through P38 (P32 through P38 are nonexistent, so the instructions to these bits are ignored). Shutdown When the MAX7301 is in shutdown mode, all ports are forced to inputs (which can be read), and the pullup current sources are turned off. Data in the port and control registers remain unaltered so port configuration and output levels are restored when the MAX7301 is taken out of shutdown. The display driver can still be programmed while in shutdown mode. For minimum supply current in shutdown mode, logic inputs should be at GND or V+ potential. Shutdown mode is exited by setting the S bit in the configuration register (Table 6).
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
Table 1. Port Configuration Map
REGISTER Port Configuration for P7, P6, P5, P4 Port Configuration for P11, P10, P9, P8 Port Configuration for P15, P14, P13, P12 Port Configuration for P19, P18, P17, P16 Port Configuration for P23, P22, P21, P20 Port Configuration for P27, P26, P25, P24 Port Configuration for P31, P30, P29, P28 ADDRESS CODE (HEX) 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F REGISTER DATA D7 P7 P11 P15 P19 P23 P27 P31 D6 D5 P6 P10 P14 P18 P22 P26 P30 D4 D3 P5 P9 P13 P17 P21 P25 P29 D2 D1 P4 P8 P12 P16 P20 P24 P28 D0
Table 2. Port Configuration Matrix
MODE FUNCTION PORT REGISTER (0x20-0x5F) (0xA0-0xDF) DO NOT USE THIS SETTING Output Input Input GPIO Output GPIO Input Without Pullup GPIO Input with Pullup Register bit = 0 Register bit = 1 Register bit = input logic level Active-low logic output Active-high logic output Schmitt logic input Schmitt logic input with pullup PIN BEHAVIOR ADDRESS CODE (HEX) 0x09 to 0x0F 0x09 to 0x0F 0x09 to 0x0F 0x09 to 0x0F PORT CONFIGURATION BIT PAIR UPPER 0 0 1 1 LOWER 0 1 0 1
Serial Interface
The MAX7301 communicates through an SPI-compatible 4-wire serial interface. The interface has three inputs, Clock (SCLK), Chip Select (CS), and Data In (DIN), and one output, Data Out (DOUT). CS must be low to clock data into or out of the device, and DIN must be stable when sampled on the rising edge of SCLK. DOUT provides a copy of the bit that was input 15.5 clocks earlier, or upon a query it outputs internal register data, and is stable on the rising edge of SCLK. Note that the SPI protocol expects DOUT to be high impedance when the MAX7301 is not being accessed; DOUT on the MAX7301 is never high impedance. See www.maxim-ic.com/an 1879 for ways to convert DOUT to tri-state, if required. SCLK and DIN may be used to transmit data to other peripherals, so the MAX7301 ignores all activity on SCLK and DIN except between the fall and subsequent rise of CS.
address (Table 3), and the second byte, D7 through D0, is the data byte (Table 4 through Table 8).
Connecting Multiple MAX7301s to the 4-Wire Bus
Multiple MAX7301s may be daisy-chained by connecting the DOUT of one device to the DIN of the next, and driving SCLK and CS lines in parallel (Figure 3). Data at DIN propagates through the internal shift registers and appears at DOUT 15.5 clock cycles later, clocked out on the falling edge of SCLK. When sending commands to multiple MAX7301s, all devices are accessed at the same time. An access requires (16 n) clock cycles, where n is the number of MAX7301s connected together. To update just one device in a daisy-chain, the user can send the No-Op command (0x00) to the others.
Writing Device Registers
The MAX7301 contains a 16-bit shift register into which DIN data are clocked on the rising edge of SCLK, when CS is low. When CS is high, transitions on SCLK have no effect. When CS goes high, the 16 bits in the Shift register are parallel loaded into a 16-bit latch. The 16 bits in the latch are then decoded and executed.
Control and Operation Using the 4-Wire Interface
Controlling the MAX7301 requires sending a 16-bit word. The first byte, D15 through D8, is the command
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
CONFIGURATION PORT REGISTERS MASK REGISTER CONFIGURATION REGISTERS DATA 8 GPIO DATA 8 COMMAND REGISTER DECODE R/W CE R/W
P4 TO P31
GPIO
PORT CHANGE DETECTOR
8
8
DATA BYTE
COMMAND BYTE
CS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
DIN
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
DOUT
SCLK
Figure 1. MAX7301 Functional Diagram
The MAX7301 is written to using the following sequence: 1) Take SCLK low. 2) Take CS low. This enables the internal 16-bit shift register. 3) Clock 16 bits of data into DIN--D15 first, D0 last-- observing the setup and hold times (bit D15 is low, indicating a write command). 4) Take CS high (either while SCLK is still high after clocking in the last data bit, or after taking SCLK low). 5) Take SCLK low (if not already low). Figure 4 shows a write operation when 16 bits are transmitted. It is acceptable to clock more than 16 bits into the MAX7301 between taking CS low and taking CS high again. In this case, only the last 16 bits clocked into the MAX7301 are retained.
Reading Device Registers
Any register data within the MAX7301 may be read by sending a logic high to bit D15. The sequence is: 1) Take SCLK low. 2) Take CS low (this enables the internal 16-bit Shift register). 3) Clock 16 bits of data into DIN--D15 first to D0 last. D15 is high, indicating a read command and bits D14 through D8 containing the address of the register to be read. Bits D7-D0 contain dummy data, which is discarded. 4) Take CS high (either while SCLK is still high after clocking in the last data bit, or after taking SCLK low), positions D7 through D0 in the Shift register are now loaded with the register data addressed by bits D1 through D8. 5) Take SCLK low (if not already low). 6) Issue another read or write command (which can be a No-Op), and examine the bit stream at DOUT; the second 8 bits are the contents of the register addressed by bits D1 through D8 in step 3.
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
CS
tCSS tCSH SCLK tCL
tCH
tCSH
tDS tDH DIN
tDO
DOUT
Figure 2. 4-Wire Interface
Initial Power-Up
On initial power-up, all control registers are reset, and the MAX7301 enters shutdown mode (Table 4).
Transition (Port Data Change) Detection
Port transition detection allows any combination of the seven ports P24-P30 to be continuously monitored for changes in their logic status (Figure 5). A detected change is flagged on port P31, which is used as an active-high interrupt output (INT). Note that the MAX7301 does not identify which specific port(s) caused the interrupt, but provides an alert that one or more port levels have changed. The mask register contains 7 mask bits that select which of the seven ports, P24-P30 are to be monitored (Table 8). Set the appropriate mask bit to enable that port for transition detect. Clear the mask bit if transitions on that port are to be ignored. Transition detection works regardless of whether the port being monitored is set to input or output, but generally it is not particularly useful to enable transition detection for outputs. Port P31 must be configured as an output in order to work as the interrupt output INT when transition detection is used. Port P31 is set as output by writing bit D7 = 0 and bit D6 = 1 to the port configuration register (Table 1). To use transition detection, first set up the mask register and configure port P31 as an output, as described above. Then enable transition detection by setting the M bit in the configuration register (Table 7). Whenever
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the configuration register is written with the M bit set, the MAX7301 updates an internal 7-bit snapshot register, which holds the comparison copy of the logic states of ports P24 through P30. The update action occurs regardless of the previous state of the M bit, so that it is not necessary to clear the M bit and then set it again to update the snapshot register. When the configuration register is written with the M bit set, transition detection is enabled and remains enabled until either the configuration register is written with the M bit clear, or a transition is detected. The INT output port P31 goes low, if it was not already low. Once transition detection is enabled, the MAX7301 continuously compares the snapshot register against the changing states of P24 through P31. If a change on any of the monitored ports is detected, even for a short time (like a pulse), INT output port P31 is latched high. The INT output is not cleared if more changes occur or if the data pattern returns to its original snapshot condition. The only way to clear INT is to access (read or write) the transition detection mask register (Table 8). Transition detection is a one-shot event. When INT has been cleared after responding to a transition event, transition detection is automatically disabled, even though the M bit in the configuration register remains set (unless cleared by the user). Reenable transition detection by writing the configuration register with the M bit set, to take a new snapshot of the seven ports P24 to P30.
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
MICROCONTROLLER SERIAL DATA INPUT
SERIAL CS OUTPUT SERIAL CLOCK OUTPUT SERIAL DATA OUTPUT
CS SCLK MAX7301 DIN DOUT
CS SCLK DIN MAX7301 DOUT
CS SCLK DIN MAX7301 DOUT
Figure 3. Daisy-Chain Arrangement for Controlling Multiple MAX7301s
CS
SCLK
D15 =0
DIN
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DOUT
.
D15 = 0
Figure 4. Transmission of a16-Bit Write to the MAX7301
External Component RISET The MAX7301 uses an external resistor, RISET, to set internal biasing. Use a resistor value of 39k.
ringing for moderately long interface runs. Use lineimpedance matching terminations when making connections between boards.
Applications Information
Low-Voltage Operation
The MAX7301 operates down to 2V supply voltage (although the sourcing and sinking currents are not guaranteed), providing that the MAX7301 is powered up initially to at least 2.5V to trigger the device's internal reset, and also that the serial interface is constrained to 10Mbps.
PC Board Layout Considerations
Ensure that all the MAX7301 GND connections are used. A ground plane is not necessary, but may be useful to reduce supply impedance if the MAX7301 outputs are to be heavily loaded. Keep the track length from the ISET pin to the RISET resistor as short as possible, and take the GND end of the resistor either to the ground plane or directly to the ground pins.
SPI Routing Considerations
The MAX7301's SPI interface is guaranteed to operate at 26Mbps on a 2.5V supply, and on a 5V supply typically operates at 50Mbps. This means that transmission line issues should be considered when the interface connections are longer than 100mm, particularly with higher supply voltages. Ringing manifests itself as communication issues, often intermittent, typically due to double clocking due to ringing at the SCLK input. Fit a 1k to 10k parallel termination resistor to either GND or V+ at the DIN, SCLK, and CS input to damp
Power-Supply Considerations
The MAX7301 operates with power-supply voltages of 2.5V to 5.5V. Bypass the power supply to GND with a 0.047F capacitor as close to the device as possible. Add a 1F capacitor if the MAX7301 is far away from the board's input bulk decoupling capacitor.
Chip Information
TRANSISTOR COUNT: 30,316 PROCESS: CMOS
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
Table 3. Register Address Map
REGISTER No-Op Configuration Transition Detect Mask Factory Reserved. Do not write to this. Port Configuration P7, P6, P5, P4 Port Configuration P11, P10, P9, P8 Port Configuration P15, P14, P13, P12 Port Configuration P19, P18, P17, P16 Port Configuration P23, P22, P21, P20 Port Configuration P27, P26, P25, P24 Port Configuration P31, P30, P29, P28 Port 0 only (virtual port, no action) Port 1 only (virtual port, no action) Port 2 only (virtual port, no action) Port 3 only (virtual port, no action) Port 4 only (data bit D0. D7-D1 read as 0) Port 5 only (data bit D0. D7-D1 read as 0) Port 6 only (data bit D0. D7-D1 read as 0) Port 7 only (data bit D0. D7-D1 read as 0) Port 8 only (data bit D0. D7-D1 read as 0) Port 9 only (data bit D0. D7-D1 read as 0) Port 10 only (data bit D0. D7-D1 read as 0) Port 11 only (data bit D0. D7-D1 read as 0) Port 12 only (data bit D0. D7-D1 read as 0) Port 13 only (data bit D0. D7-D1 read as 0) Port 14 only (data bit D0. D7-D1 read as 0) Port 15 only (data bit D0. D7-D1 read as 0) Port 16 only (data bit D0. D7-D1 read as 0) Port 17 only (data bit D0. D7-D1 read as 0) Port 18 only (data bit D0. D7-D1 read as 0) Port 19 only (data bit D0. D7-D1 read as 0) Port 20 only (data bit D0. D7-D1 read as 0) Port 21 only (data bit D0. D7-D1 read as 0) Port 22 only (data bit D0. D7-D1 read as 0) Port 23 only (data bit D0. D7-D1 read as 0) Port 24 only (data bit D0. D7-D1 read as 0) Port 25 only (data bit D0. D7-D1 read as 0) COMMAND ADDRESS D15 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W D14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D13 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 D11 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 D10 0 1 1 1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 D9 0 0 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D8 0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 HEX CODE 0x00 0x04 0x06 0x07 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39
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4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
Table 3. Register Address Map (continued)
REGISTER Port 26 only (data bit D0. D7-D1 read as 0) Port 27 only (data bit D0. D7-D1 read as 0) Port 28 only (data bit D0. D7-D1 read as 0) Port 29 only (data bit D0. D7-D1 read as 0) Port 30 only (data bit D0. D7-D1 read as 0) Port 31 only (data bit D0. D7-D1 read as 0) 4 ports 4-7 (data bits D0-D3. D4-D7 read as 0) 5 ports 4-8 (data bits D0-D4. D5-D7 read as 0) 6 ports 4-9 (data bits D0-D5. D6-D7 read as 0) 7 ports 4-10 (data bits D0-D6. D7 reads as 0) 8 ports 4-11 (data bits D0-D7) 8 ports 5-12 (data bits D0-D7) 8 ports 6-13 (data bits D0-D7) 8 ports 7-14 (data bits D0-D7) 8 ports 8-15 (data bits D0-D7) 8 ports 9-16 (data bits D0-D7) 8 ports 10-17 (data bits D0-D7) 8 ports 11-18 (data bits D0-D7) 8 ports 12-19 (data bits D0-D7) 8 ports 13-20 (data bits D0-D7) 8 ports 14-21 (data bits D0-D7) 8 ports 15-22 (data bits D0-D7) 8 ports 16-23 (data bits D0-D7) 8 ports 17-24 (data bits D0-D7) 8 ports 18-25 (data bits D0-D7) 8 ports 19-26 (data bits D0-D7) 8 ports 20-27 (data bits D0-D7) 8 ports 21-28 (data bits D0-D7) 8 ports 22-29 (data bits D0-D7) 8 ports 23-30 (data bits D0-D7) 8 ports 24-31 (data bits D0-D7) 7 ports 25-31 (data bits D0-D6. D7 reads as 0) 6 ports 26-31 (data bits D0-D5. D6-D7 read as 0) 5 ports 27-31 (data bits D0-D4. D5-D7 read as 0) 4 ports 28-31 (data bits D0-D3. D4-D7 read as 0) 3 ports 29-31 (data bits D0-D2. D3-D7 read as 0) 2 ports 30-31 (data bits D0-D1. D2-D7 read as 0) 1 port 31 only (data bit D0. D1-D7 read as 0) COMMAND ADDRESS D15 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W D14 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D13 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D12 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D11 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D10 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D9 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 HEX CODE 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F
Note: Unused bits read as 0.
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11
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
GPIO INPUT CONDITIONING GPIO/PORT OUTPUT LATCH
GPIO IN
GPIO/PORT OUT
P31 INT OUTPUT LATCH R S CLOCK PULSE AFTER EACH READ ACCESS TO MASK REGISTER
CONFIGURATION REGISTER M BIT = SET GPIO INPUT CONDITIONING P30 GPIO/PORT OUTPUT LATCH GPIO INPUT CONDITIONING P29 GPIO/PORT OUTPUT LATCH GPIO INPUT CONDITIONING P28 GPIO/PORT OUTPUT LATCH GPIO IN GPIO IN D GPIO/PORT OUT Q MASK REGISTER BIT 4 GPIO IN GPIO IN D GPIO/PORT OUT Q MASK REGISTER BIT 6
D
Q MASK REGISTER BIT 5
GPIO/PORT OUT
GPIO INPUT CONDITIONING P27 GPIO/PORT OUTPUT LATCH GPIO INPUT CONDITIONING P26 GPIO/PORT OUTPUT LATCH GPIO INPUT CONDITIONING P25 GPIO/PORT OUTPUT LATCH
D
Q MASK REGISTER BIT 3
OR
GPIO/PORT OUT
GPIO IN D GPIO/PORT OUT Q MASK REGISTER BIT 2
GPIO IN
D
Q MASK REGISTER BIT 1
GPIO/PORT OUT
GPIO INPUT CONDITIONING P24 GPIO/PORT OUTPUT LATCH
GPIO IN D GPIO/PORT OUT Q MASK REGISTER LSB CLOCK PULSE WHEN WRITING CONFIGURATION REGISTER WITH M BIT SET
Figure 5. Maskable GPIO Ports P24 Through P31
12
______________________________________________________________________________________
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
Table 4. Power-Up Configuration
REGISTER FUNCTION Port Register Bits 4 to 31 Configuration Register Input Mask Register Port Configuration Port Configuration Port Configuration Port Configuration Port Configuration Port Configuration Port Configuration POWER-UP CONDITION GPIO Output Low Shutdown Enabled Transition Detection Disabled All Clear (Masked Off) P7, P6, P5, P4: GPIO Inputs Without Pullup P11, P10, P9, P8: GPIO Inputs Without Pullup P15, P14, P13, P12: GPIO Inputs Without Pullup P19, P18, P17, P16: GPIO Inputs Without Pullup P23, P22, P21, P20: GPIO Inputs Without Pullup P27, P26, P25, P24: GPIO Inputs Without Pullup P31, P30, P29, P28: GPIO Inputs Without Pullup ADDRESS CODE (HEX) 0x24 to 0x3F 0x04 0x06 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F REGISTER DATA D7 X 0 X 1 1 1 1 1 1 1 D6 X 0 0 0 0 0 0 0 0 0 D5 X X 0 1 1 1 1 1 1 1 D4 X X 0 0 0 0 0 0 0 0 D3 X X 0 1 1 1 1 1 1 1 D2 X X 0 0 0 0 0 0 0 0 D1 X X 0 1 1 1 1 1 1 1 D0 0 0 0 0 0 0 0 0 0 0
X = unused bits; if read, zero results.
Table 5. Configuration Register Format
FUNCTION Configuration Register ADDRESS CODE (HEX) 0x04 REGISTER DATA D7 M D6 0 D5 X D4 X D3 X D2 X D1 X D0 S
Table 6. Shutdown Control (S Data Bit D0) Format
FUNCTION Shutdown Normal Operation ADDRESS CODE (HEX) 0x04 0x04 REGISTER DATA D7 M M D6 0 0 D5 X X D4 X X D3 X X D2 X X D1 X X D0 0 1
______________________________________________________________________________________
13
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
Table 7. Transition Detection Control (M Data Bit D7) Format
FUNCTION Disabled Enabled ADDRESS CODE (HEX) 0x04 0x04 REGISTER DATA D7 0 1 D6 0 0 D5 X X D4 X X D3 X X D2 X X D1 X X D0 S S
Table 8. Transition Detection Mask Register
FUNCTION REGISTER ADDRESS (HEX) READ/ WRITE Read 0x06 Write Unchanged REGISTER DATA D7 0 D6 Port 30 mask D5 Port 29 mask D4 Port 28 mask D3 Port 27 mask D2 Port 26 mask D1 Port 25 mask D0 Port 24 mask
Mask Register
14
______________________________________________________________________________________
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
Pin Configurations
TOP VIEW
DOUT GND ISET V+ CS DIN SCLK GND GND N.C.
MAX7301
40
39
38
37
36
35
34
33
32
ISET GND GND DOUT P8 P12 P9 P13 P10
1 2 3 4 5 6 7 8 9
36 V+ 35 CS 34 DIN 33 SCLK 32 P4 31 P31 P8 P12 P9 P13 P10 P14 P11 P15 P16 P17
1 2 3 4 5 6 7 8 9 10
31
ISET 1
30 29 28 27 26 25 24 23 22 21
28 V+ 27 CS 26 DIN 25 SCLK 24 P31 23 P30
P4 P31 P5 P30 P6 P29 P7 P28 P27 P26
GND 2 GND 3 DOUT 4 P12 5 P13 6 P14 7 P15 8 P16 9 P17 10 P18 11 P19 12
MAX7301
MAX7301
30 P5 29 P30 28 P6 27 P29 26 P7 25 P28 24 P27 23 P26 22 P25 21 P24 20 P23 19 P22
MAX7301
22 P29 21 P28 20 P27 19 P26 18 P25 17 P24 16 P23 15 P22
11
12
13
14
15
16
17
18
19
N.C.
P18 P19 P20 P21 P22 P23
P24
P15 12 P16 13 P17 14 P18 15 P19 16 P20 17 P21 18
QFN
P25 N.C.
P11 11
20
P14 10
P20 13 P21 14
SSOP/DIP
SSOP
______________________________________________________________________________________
15
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
2 1
SSOP.EPS
INCHES DIM A A1 B C E H D E e H L MIN 0.068 0.002 0.010 MAX 0.078 0.008 0.015
MILLIMETERS MIN 1.73 0.05 0.25 MAX 1.99 0.21 0.38 D D D D D INCHES MIN 0.239 0.239 0.278 0.317 0.397 MAX 0.249 0.249 0.289 0.328 0.407 MILLIMETERS MIN 6.07 6.07 7.07 8.07 10.07 MAX 6.33 6.33 7.33 8.33 10.33 N 14L 16L 20L 24L 28L
0.09 0.20 0.004 0.008 SEE VARIATIONS 0.205 0.301 0.025 0 0.212 0.311 0.037 8 5.20 7.65 0.63 0 5.38 7.90 0.95 8 0.0256 BSC 0.65 BSC
N
A C B e D A1 L
NOTES: 1. D&E DO NOT INCLUDE MOLD FLASH. 2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006"). 3. CONTROLLING DIMENSION: MILLIMETERS. 4. MEETS JEDEC MO150. 5. LEADS TO BE COPLANAR WITHIN 0.10 MM.
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, SSOP, 5.3 MM
APPROVAL DOCUMENT CONTROL NO. REV.
21-0056
C
1 1
16
______________________________________________________________________________________
36L,40L, QFN.EPS
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX7301
U
______________________________________________________________________________________
17
4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and 28-Port I/O Expander MAX7301
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
SSOP.EPS
REV.
36
INCHES DIM A A1 B C e E H L D MAX MIN 0.104 0.096 0.004 0.011 0.017 0.012 0.013 0.009 0.0315 BSC 0.299 0.291 0.398 0.414 0.040 0.020 0.598 0.612
MILLIMETERS MAX MIN 2.65 2.44 0.29 0.10 0.44 0.30 0.23 0.32 0.80 BSC 7.40 7.60 10.11 10.51 0.51 15.20 1.02 15.55
E
H
1
TOP VIEW
D A1 e A C 0 -8
B
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE, 36L SSOP, 0.80 MM PITCH
APPROVAL DOCUMENT CONTROL NO.
21-0040
E
1 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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